w65c832: W65C832 (32 bit 6502) in an FPGA
10 points by lproven
10 points by lproven
Speaking as a big pro-6502 bigot, the 65816 could have been more than what it is. Two things that have always irked me about it is the use of a processor flag instead of opcode bits to determine operation width, meaning an arbitrary instruction cannot be interpreted without knowing the state of the CPU right then (is it an 8-bit store? 16?), and the segmentation model is worse than x86; you can’t even execute over the end of a 64K bank.
Unfortunately, though I expect that was for compatibility, this duplicates the same deficiencies. If this was going to be a wish list 65832, I would have hoped to see more thought made about how to get around those limitations, possibly only implementing them in a 65816/65C02 compatibility mode.
Speaking as a big pro-6502 bigot, the 65816 could have been more than what it is. Two things that have always irked me about it is the use of a processor flag instead of opcode bits to determine operation width, meaning an arbitrary instruction cannot be interpreted without knowing the state of the CPU right then (is it an 8-bit store? 16?),
Hence in “Soul of a New Machine”, the “NO MODE BIT” rule.
I thought the wish-list 32 bit successor to the 6502 is the ARM :-)
Exactly! :-)
Until now, all I knew of were 2 datasheets – a preliminary one:
And a v2:
https://downloads.reactivemicro.com/Electronics/CPU/W65C832%20CPU%20Datasheet%20v2.0.pdf
Since the 65x816 was so compromised that some of the current next-gen C64-compatibles simply eschew it, I figured that the ’832 would be even more arcane in various ways, TBH…